Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH09283762
Kind Code:
A
Abstract:

To provide a semiconductor device which operates with a low power voltage and in which a logic circuit is constituted with a drastically-reduced number of devices.

A buried oxide film 102 is formed on a silicon substrate 101, and a silicon p-type SOI layer 103 is formed on the buried oxide film 102. A first n-type diffusion layer 107a and a second n-type diffusion layer 107b are formed on both sides of the p-type SOI layer 103, and a p-type impurity diffusion layer 108 is formed at a region adjoining to the p-type SOI layer 103. The p-type SOI layer 103, the first and second n-type diffusion layers 107a and 107b, and the p-type impurity diffusion layer 108 are surrounded by a device isolation oxide film 104 formed on the buried oxide film 102, thereby completely isolating from each other.


Inventors:
MORITA KIYOYUKI
MORIMOTO TADASHI
IRIE SHIGEO
Application Number:
JP9257096A
Publication Date:
October 31, 1997
Filing Date:
April 15, 1996
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L27/12; H01L29/786; (IPC1-7): H01L29/786; H01L27/12
Attorney, Agent or Firm:
前田 弘 (外2名)