SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

Japanese Patent JP2007165480

A

To provide a semiconductor device which has a transistor of a salicide structure and a transistor of a nonsalicide structure that are formed on one board, and prevents an increase in the contact resistance of the transistor of the salicide structure that is caused by a protective film formed upon forming the salicide structure.

The semiconductor device includes a first MIS (metal insulator semiconductor) transistor 51 of a nonsalicide structure, and a second MIS transistor 52 of a salicide structure. Both transistors 51 and 52 are formed on a board 11 made of silicon. The first MIS transistor 51 has a first gate electrode 14A made of silicon, a first side wall 15A, a first source/drain 16A, and a plasma reactant film 18 grown under a plasma atmosphere which plasma reactant film 18 covers the upper surface of the first gate electrode 14A and the upper surface of the first source/drain 16A.

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KAMEI MASAYUKI
MIYANAGA ISAO
YAMADA TAKAYUKI

JP2005358103A

June 28, 2007

December 12, 2005

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MATSUSHITA ELECTRIC IND CO LTD

H01L21/8234; H01L21/28; H01L27/088; H01L29/417; H01L29/423; H01L29/49

JP2001257273A	2001-09-21
JP2004241444A	2004-08-26
JP2000156502A	2000-06-06
JP2000260767A	2000-09-22
JP2000235975A	2000-08-29

Hiroshi Maeda
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura

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