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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2013120831
Kind Code:
A
Abstract:

To improve performance of a semiconductor device.

A semiconductor device manufacturing method comprises: forming a gate electrode GE1 on a semiconductor substrate 1 via a gate insulation film GI1; forming a dummy gate electrode via a dummy insulation film; subsequently, forming an n+ type semiconductor region SD1 and a p+ type semiconductor region SD2, which serve as source/drain; exposing top faces of the gate electrode GE1 and the dummy gate electrode by forming and polishing an insulation film IL1 so as to cover the gate electrode GE1 and the dummy gate electrode; subsequently, removing the dummy gate electrode and the gate insulation film GI1 to expose the semiconductor substrate 1; oxidizing the exposed surface by an oxidation treatment to form an oxide film; removing the oxide film by etching; forming an epitaxial layer EP1 on the semiconductor substrate 1 exposed again; and subsequently, forming a gate electrode GE2a on the epitaxial layer EP1 via a gate insulation film GI2a.


Inventors:
UMEDA KOJI
Application Number:
JP2011267786A
Publication Date:
June 17, 2013
Filing Date:
December 07, 2011
Export Citation:
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Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H01L21/8238; H01L21/28; H01L21/336; H01L27/092; H01L29/423; H01L29/49; H01L29/78
Attorney, Agent or Firm:
Yamato Tsutsui
Atsushi Sugada
Akiko Tsutsui
Tetsuya Sakaji