SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE

Title:

SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE

Document Type and Number:

Japanese Patent JP2013145785

Kind Code:

A

Abstract:

To improve characteristics of a semiconductor device by improving controllability in etching of a silicon film which constitutes resistance.

A manufacturing method of a semiconductor device having a low-voltage MOS transistor formed in a low-voltage MOS area LMA of a semiconductor substrate 1 and a poly-Si resistance R formed in a poly-Si resistance area RA, comprises: (a) a step of forming a gate electrode GL composed of stacked films of a silicon film 17 and a metal silicide film 18 in the low-voltage MOS area LMA; (b) a step of forming, at least in the poly-Si resistance area RA, a foundation insulation film 20 containing nitride and silicon after the step (a); and (c) a step of forming, after the step (b), a polycrystalline silicon film 21 on the foundation insulation film 20, and forming a poly-Si resistance R constituted by the polycrystalline silicon film 21 by etching the polycrystalline silicon film 21 using the foundation insulation film 20 as an etching stopper film.

Inventors:

YONEMOCHI YASUAKI

Application Number:

JP2012004913A

Publication Date:

July 25, 2013

Filing Date:

January 13, 2012

Export Citation:

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Assignee:

RENESAS ELECTRONICS CORP

International Classes:

H01L21/8234; H01L21/768; H01L21/822; H01L21/8238; H01L23/532; H01L27/04; H01L27/06; H01L27/088; H01L27/092

Attorney, Agent or Firm:

Yamato Tsutsui
Atsushi Sugada
Akiko Tsutsui
Tetsuya Sakaji

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