Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2020047836
Kind Code:
A
Abstract:
To improve the manufacturing efficiency of a semiconductor device.SOLUTION: A manufacturing method of a semiconductor device includes a sealing step of sealing a semiconductor chip mounted on a wiring board MS. The wiring board includes an upper surface WSt on which the semiconductor chip is mounted, and a lower surface WSb opposite to the upper surface WSt. The sealing step includes a step of disposing the wiring board MS between an upper mold MT1 and a lower mold MT2, and holding the wiring board MS on the upper mold MT1 by sucking the lower surface WSb of the wiring board MS with a plurality of suction holes VH, and a step of sealing and covering the semiconductor chip, the upper surface WSt of the wiring board MS, and each of the plurality of side surfaces of the wiring board MS with a resin MRa in the lower mold MT2.SELECTED DRAWING: Figure 24
Inventors:
SATO YOSHIAKI
MIYAKI YOSHINORI
ARITA JUNICHI
MIYAKI YOSHINORI
ARITA JUNICHI
Application Number:
JP2018176123A
Publication Date:
March 26, 2020
Filing Date:
September 20, 2018
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H01L21/56; H01L23/12
Attorney, Agent or Firm:
Tsutsui International Patent Office