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Title:
半導体装置の製造方法、電気光学装置、集積回路、および電子機器
Document Type and Number:
Japanese Patent JP4900756
Kind Code:
B2
Abstract:
An object is to provide a semiconductor device manufacturing method which makes possible a thin film transistor which is little affected by crystal grain boundaries, even when the channel width of the thin film transistor is made larger than the crystal grains of the semiconductor material. To this end, a thin film transistor of this invention comprises a gate electrode 22 , source region 24 , drain region 25 , and channel formation region 26 . The silicon film used in forming the active region comprises a plurality of substantially single-crystal silicon crystal grains, and regions including crystal grain boundaries which exist in the longitudinal direction of the channel formation region 26 (the direction L in the drawings) are removed. By this means, crystal grain boundaries are prevented from being included in each channel formation region 26 , and the effective channel width can be increased.

Inventors:
Hiroshima cheap
Mitsutoshi Miyasaka
Application Number:
JP2003105730A
Publication Date:
March 21, 2012
Filing Date:
April 09, 2003
Export Citation:
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Assignee:
Seiko Epson Corporation
International Classes:
H01L21/20; H01L21/336; H01L21/77; H01L29/786
Domestic Patent References:
JP3060043A
JP8321466A
JP2001028340A
Other References:
Ryoichi Ishihara,Advanced Excimer-Laser Crystallization Techniques of Si Thin-Film for Location Control of Large Grain on Glass,Proceedings of SPIE,2001年,4295巻,pp.14-23
Ryoichi Ishihara,Advanced Excimer-Laser Crystallization Techniques of Si Thin-Film for Location Control of Large Grai,Proceedings of SPIE,2001年,4295巻,pp.14-23
Attorney, Agent or Firm:
Yoshiyuki Inaba
Katsuro Tanaka
Shinji Oga