Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Document Type and Number:
Japanese Patent JP2016051745
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor device with improved performance that includes a memory cell having a control gate electrode and a memory gate electrode formed on the control gate electrode via a charge storage layer.SOLUTION: In a semiconductor device that has a MISFET Q1 including a gate electrode G1 that is a metal gate electrode formed by a gate-last process, each of a control gate electrode CG and a memory gate electrode MG that configure a memory cell MC of a split gate type MONOS memory is formed by full-siliciding a silicon film.SELECTED DRAWING: Figure 1
Inventors:
AMOU ATSUSHI
Application Number:
JP2014174823A
Publication Date:
April 11, 2016
Filing Date:
August 29, 2014
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H01L21/8247; H01L21/336; H01L27/10; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP2008159650A | 2008-07-10 | |||
| JP2014154790A | 2014-08-25 | |||
| JP2011049282A | 2011-03-10 | |||
| JP2007109800A | 2007-04-26 | |||
| JP2005228786A | 2005-08-25 | |||
| JP2009010281A | 2009-01-15 |
Attorney, Agent or Firm:
Yamato Tsutsui
Atsushi Sugada
Akiko Tsutsui
Tetsuya Sakaji
Atsushi Sugada
Akiko Tsutsui
Tetsuya Sakaji