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Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Document Type and Number:
Japanese Patent JP3649993
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide a semiconductor device which substantially increases the area of a mounting surface of a packaged semiconductor device by integrally packaging a plurality of semiconductor chips, and which has a projected electrode structure capable of using even a prior art surface mounting technique, and also to provide a method of manufacturing such a semiconductor device.
SOLUTION: A plurality of semiconductor chips 12 and 16 are placed on a mounting jig, a copper post 26 is formed on each semiconductor chip, and the chips are sealed with sealing resin 28. A re-wiring layer 18 is formed on the sealing resin 28 to electrically connect the semiconductor chips each other, and lands 18b are formed to be connected to the electrodes of the semiconductor device itself. A copper post 32 is formed on the land 18b of the re-wiring layer 18 and sealed with sealing resin 34. A solder ball 36 is formed on the copper post 34 as a projected electrode.


Inventors:
Yoshitaka Aiba
Mitsutaka Sato
Toshio Hamano
Application Number:
JP2000143719A
Publication Date:
May 18, 2005
Filing Date:
May 16, 2000
Export Citation:
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Assignee:
富士通株式会社
International Classes:
H01L23/12; H01L23/48; H01L23/498; H01L23/538; H01L25/04; H01L25/065; H01L25/07; H01L25/18; (IPC1-7): H01L25/04; H01L23/12; H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
JP2001223319A
JP10079362A
JP11026642A
JP2000243876A
Attorney, Agent or Firm:
Tadahiko Ito