Title:
SEMICONDUCTOR DEVICE AND PLL CIRCUIT
Document Type and Number:
Japanese Patent JP2005150152
Kind Code:
A
Abstract:
To solve the problem, wherein a shielding wire must be mounted between both wirings in order to avoid a crosstalks between the mutually crossed wires for a signal on a multilayer structure and that the area of a substrate must be widened.
A semiconductor device has a plurality of circuits constituted of the multilayer structure on the substrate. A plurality of the circuits are arranged so that one wiring in a plurality of the wires among a plurality of the circuits in one layers of the multilayer structure, and that the other wiring in a plurality of the wires in the other layers of the multilayer structure do not cross mutually.
Inventors:
KOBAYASHI MASANORI
FURUYA YASUSHIGE
FURUYA YASUSHIGE
Application Number:
JP2003381282A
Publication Date:
June 09, 2005
Filing Date:
November 11, 2003
Export Citation:
Assignee:
SEIKO EPSON CORP
International Classes:
H01L21/768; H01L21/822; H01L23/522; H01L27/04; H03L7/08; H03L7/089; H03L7/18; H01L27/02; (IPC1-7): H01L21/822; H01L21/768; H01L27/04; H03L7/08
Attorney, Agent or Firm:
Masahiko Ueyanagi
Fujitsuna Hideyoshi
Osamu Suzawa
Fujitsuna Hideyoshi
Osamu Suzawa