Title:
SEMICONDUCTOR DEVICE AND PRODUCTION THEREOF
Document Type and Number:
Japanese Patent JP3235581
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To easily form the inter-layer film of low inter-layer capacity by preparing an air gap not only between wiring but also between upper and lower wiring layers, when forming a multilayered semiconductor device while using a dual damascene method.
SOLUTION: This device 100 is constituted by laminating the plural stages of wiring layers 2 and 5 composed of embedded wiring via a prescribed insulating film layer 30. In this case, a sealed space part 40 formed by etching is arranged between plural embedded wiring 21 and 22 composed of one of respective wiring layer groups 2 and 5 on that wiring layer 2.
Inventors:
Masaharu Kikuchi
Application Number:
JP539699A
Publication Date:
December 04, 2001
Filing Date:
January 12, 1999
Export Citation:
Assignee:
NEC
International Classes:
H01L23/522; H01L21/768; (IPC1-7): H01L21/768
Domestic Patent References:
| JP4334047A | ||||
| JP10284597A |
Attorney, Agent or Firm:
Yasuyuki Hata