PURPOSE: To provide a semiconductor device which uses a p-type SOI substrate which does not generate n-type inversion without unnecessary process and power source for a semiconductor device which uses a laminated SOI substrate.

CONSTITUTION: A substrate with 1016cm-3 or less impurity concentration is used on the side of an activating layer 3 and an laminating SOI substrate which uses a substrate with 1018cm-3 or more p-type impurity concentration is used on the side of a supporting substrate 1. Holes 4 are accumulated at the bottom of the activating layer 3 by the Fermi level difference between the activating layer 3 and the supporting substrate 1 due to the difference between the p-type impurity concentrations and n-type reversion generated in the activating layer 3 by positive fixed charges in a bed insulating layer 2 is compensated.