Title:
半導体装置及び半導体装置製造方法
Document Type and Number:
Japanese Patent JP4316019
Kind Code:
B2
Abstract:
A semiconductor device comprising a package formed of a thermoplastic resin, first and second lead frames arranged parallel to each other with a predetermined space interposed therebetween, and each having a distal end portion of a predetermined length located in the package, solder films formed on the first and second lead frames from outside the package to inside the package, a semiconductor element mounted on the distal end portion of the first lead frame and having an electrode, and a bonding wire having an end connected to the electrode of the semiconductor element, and another end connected to the distal end portion of the second lead frame.
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Inventors:
Masaki Adachi
Isao Ogawa
Isao Ogawa
Application Number:
JP23239297A
Publication Date:
August 19, 2009
Filing Date:
August 28, 1997
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L23/28; H01L31/12; H01L21/56; H01L21/60; H01L23/495; H01L23/50; H01L33/48; H01L33/62
Domestic Patent References:
| JP51115775A | ||||
| JP2110982A | ||||
| JP6112518A | ||||
| JP7038143A | ||||
| JP10144839A | ||||
| JP4312963A | ||||
| JP4329680A | ||||
| JP6283645A | ||||
| JP9083013A | ||||
| JP55071045A | ||||
| JP59028553A | ||||
| JP58111958U | ||||
| JP58111959U |
Attorney, Agent or Firm:
Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Sadao Muramatsu
Shoji Kawai
Satoshi Kono
Makoto Nakamura
Sadao Muramatsu
Shoji Kawai