Title:
SEMICONDUCTOR DEVICE WITH TRENCH STRUCTURE AND ITS MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2007081424
Kind Code:
A
Abstract:
To improve properties of a gate oxide film formed on trench inner walls, in a MOS gate power device etc. having a trench MOS gate structure.
Trenches are formed in a principal plane of a semiconductor substrate, at least an insulating layer is formed on inner surfaces of the trenches, and an electric conductive film is formed on the principal plane of a semiconductor substrate including the interior of the trenches. Furthermore, nitrogen is injected into the electric conductive film, and the semiconductor device having trench structures is formed, on which the electric conductive film is patterned corresponding to the trench.
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Inventors:
NAKAMURA KATSUMITSU
Application Number:
JP2006309204A
Publication Date:
March 29, 2007
Filing Date:
November 15, 2006
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L21/336; H01L21/28; H01L29/423; H01L29/49; H01L29/739; H01L29/78
Domestic Patent References:
| JPH09153613A | 1997-06-10 | |||
| JPH0964346A | 1997-03-07 |
Attorney, Agent or Firm:
Mamoru Takada
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