Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2000332124
Kind Code:
A
Abstract:
To prevent efficiency deterioration due to juncture temperature rise.
A means is selected from the following three alternatives: thermally coupling a transistor(TR) for power amplification and a TR 6 of a current mirror circuit by a metal electrode layer 4; arranging a TR for potential generation of the current mirror circuit between fingers 1A and 1B of the TR for power amplification; or making the distance between the TR for potential generation of the current mirror circuit and the fingers 1A and 1B of the TR for power amplification less than the thickness of a semiconductor substrate 7.
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Inventors:
MORITSUKA KOHEI
KURIYAMA YASUHIKO
KURIYAMA YASUHIKO
Application Number:
JP28067299A
Publication Date:
November 30, 2000
Filing Date:
September 30, 1999
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
H01L21/331; H01L21/8222; H01L27/082; H01L29/737; H03F1/02; H03F1/30; H03F3/19; H01L29/73; H03F3/213; (IPC1-7): H01L21/8222; H01L27/082; H01L21/331; H01L29/73; H03F1/02; H03F1/30; H03F3/213
Attorney, Agent or Firm:
Norio Ogo (1 outside)