SEMICONDUCTOR DEVICE

Japanese Patent JP2002050718

A

To realize a semiconductor device which can ensure electrical connections of bump electrodes, formed on an LSI chip with electrode pads on a wiring board with high reliability, to be within a guaranteed temperature range.

The linear expansion coefficient of a bonding agent 3 is set as 20 to 60 ppm, and the elastic coefficient of a build-up member 6 is set as 5 to 10 Gpa. Moreover, the member 6 is used as a multilayered build-up substrate, and the peak value (glass transition temperature) of the loss factor of the multilayer build-up substrate exists in the extent of 100 to 250°C but does not exist in the range of 0 to 100°C. In this way, by setting the values of the physical properties of the bonding agent 3 and the member 6, a semiconductor device which can ensure the electrical connection of bump electrodes 2 formed on an LSI chip 1 with electrode pads 4 on a wiring board 5 with high reliability within a guaranteed temperature range can be realized.

TANAKA TADAYOSHI
MIURA HIDEO
SUMI YOSHIYUKI
YOSHIDA IKUO
NAITO TAKAHIRO

JP2000236467A

February 15, 2002

August 04, 2000

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HITACHI LTD

H01L21/56; H01L21/60; H01L23/00; H01L23/12; H01L23/14; H01L23/31; H05K3/32; H01L23/29; H05K3/46; (IPC1-7): H01L23/14; H01L21/60; H01L23/12; H01L23/29; H01L23/31; H05K3/32; H05K3/46

Kasuga

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