To reduce the insertion loss in a high frequency band and to improve isolation characteristics by reducing the capacitive component when an FET is off.
Related to a semiconductor substrate, a buffer layer 24 having the impurity concentration 1010-1014 cm-3 is formed on a semi-insulating semiconductor 25 containing p- or n-type impurities of 1014-1016 cm-3, while an active layer 23 containing p- or n-type impurity concentration of 1015-1017 cm-3 is formed on the buffer layer. On the semiconductor substrate, FETs 30a and 30b comprising a gate electrode whose gate length is 0.8 μm or shorter are formed. If n-pieces of FETs are coupled, with n being 1≤m≤n-1 (n and m are integers, n<1), the drain terminal of m-th FET is connected to the source terminal of (m+1)th FET, while resistors 41a and 41b are connected to the gate electrodes of all FETs, 1-th to n-th, with all other ends of the resistors connected to the same electric potential.
TANPO TOSHIHARU
KITAZAWA TAKAHIRO
TAMURA AKIYOSHI
TARA KATSUJI
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