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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2008177491
Kind Code:
A
Abstract:

To provide a technique which can fully protect an inner circuit against electrostatic discharge even if a power supply pad for inner circuit and a GND pad for inner circuit are formed on an inner circuit region.

At first, a power supply pad 5a for inner circuit and a GND pad 5b for inner circuit are disposed in a core region 2 of a semiconductor chip. An inner circuit is formed between the power supply pad 5a for inner circuit and the GND pad 5b for inner circuit. An electrostatic protection circuit 8 for protecting the inner circuit against surge current is further formed between the power supply pad 5a for inner circuit and the GND pad 5b for inner circuit. The electrostatic protection circuit 8 is constituted of a discharge circuit 8a for making surge current flow and a control circuit 8b for controlling the discharge circuit 8a. In the device, the discharge circuit 8a is disposed in a core region, and the control circuit 8b is disposed in an I/O region 3.


Inventors:
TAKAKUWA KOICHIRO
TANAKA KAZUO
Application Number:
JP2007011661A
Publication Date:
July 31, 2008
Filing Date:
January 22, 2007
Export Citation:
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Assignee:
RENESAS TECH CORP
International Classes:
H01L21/822; H01L21/82; H01L21/8238; H01L27/04; H01L27/06; H01L27/092
Attorney, Agent or Firm:
Yamato Tsutsui