To provide a semiconductor device which can reduce capacitance between gate-drain and reduce a time change rate di/dt of a collector current in an on-state.
A semiconductor device comprises: projected semiconductor regions 2 provided on a first principal surface of a semiconductor substrate which is to become an n- type drift layer 1; p type base layers 3 and n++ type emitter layers 4 which are provided inside the projected semiconductor regions 2, in which the p type base layers 3 are sandwiched by the n++ type emitter layers 4 and the n- type drift layer 1 at lateral faces of the projected semiconductor regions 2; a gate electrode 7 is opposite to a part of the p type base layer 3, which is sandwiched by the n++ type emitter layers 4 and the n- type drift layer 1 via a gate insulation film 6 between the neighboring projected semiconductor regions 2; a dummy gate electrode 9 which is provided at a distance from the gate electrode 7 across the projected semiconductor regions 2 and which is opposite to the n- type drift layer 1 via a dummy gate insulation film 8; and an emitter electrode 10 to which the dummy gate electrode 9 is connected.
NAKAGAWA AKIO
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