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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2015144286
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit where power consumption is reduced and an operational delay is reduced.SOLUTION: Each of a plurality of sequential circuits 21_1 to 21_n in a storage circuit 11 comprises a transistor 31 having a channel forming region comprising an oxide semiconductor, and a capacitive element 32 having one electrode electrically connected to a node that is brought to a floating state when the transistor is turned to an off state. The channel forming region of the transistor comprising the oxide semiconductor achieves the transistor with extremely low off state current (leakage current). The transistor is turned to the off state in a period when supply voltage is not supplied to a storage circuit to maintain constant or substantially constant potential in the period at the node electrically connected with the one electrode of the capacitive element.

Inventors:
KOYAMA JUN
Application Number:
JP2015029535A
Publication Date:
August 06, 2015
Filing Date:
February 18, 2015
Export Citation:
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Assignee:
SEMICONDUCTOR ENERGY LAB
International Classes:
H01L29/786; H01L21/336; H01L21/8234; H01L27/06; H01L27/08; H01L27/088; H03K3/356; H03K19/20; H03K23/44
Domestic Patent References:
JPH05110392A1993-04-30
JP2010016163A2010-01-21
JP2010166030A2010-07-29
JP2008300518A2008-12-11
JP2001230326A2001-08-24
JP2002026142A2002-01-25
JP2009167087A2009-07-30
JP2008098637A2008-04-24
JP2003298062A2003-10-17
JP2010040552A2010-02-18
JP2004088469A2004-03-18
JP2008277665A2008-11-13
JP2008281988A2008-11-20
JP2008103732A2008-05-01
Foreign References:
US20080299702A12008-12-04



 
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