Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2017216611
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To reduce the number of dummy gate capacitances required for output circuits while equalizing the number of fan-outs.SOLUTION: A semiconductor device comprises: power supply wiring V1; an output terminal 4; and a plurality of output drivers 30-36 which is activated in response to a selection signal X and connected between the power supply wiring V1 and the output terminal 4 in parallel and include at least first and second output drivers. The first output driver 32 has a plurality of transistors which include at least first and second transistors N21, N22 and are connected in series; and the second output driver 34 has a plurality of transistors which include at least third and fourth transistors N41, N42 and are connected in parallel. A selection signal X is supplied to a control electrode of the first transistor N21; and a first control signal C<2> is supplied to a control electrode of the second transistor N22; and a second control signal D<4> is commonly supplied to control electrodes of the third and fourth transistors N41, N42.SELECTED DRAWING: Figure 1
Inventors:
ARAI TETSUYA
TSUKADA SHUICHI
TANIGUCHI ATSUNORI
TSUKADA SHUICHI
TANIGUCHI ATSUNORI
Application Number:
JP2016109861A
Publication Date:
December 07, 2017
Filing Date:
June 01, 2016
Export Citation:
Assignee:
MICRON TECHNOLOGY INC
International Classes:
H03K19/0175
Attorney, Agent or Firm:
Mitsuhiro Washito
Ogata Japanese
Yasuyuki Kurose
Ogata Japanese
Yasuyuki Kurose