Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2019125627
Kind Code:
A
Abstract:
To provide a semiconductor device in which performance characteristics can be stabilized easily.SOLUTION: A semiconductor device having a laminate, a semiconductor pillar and a gate insulator is provided. The semiconductor pillar penetrates the laminate in a lamination direction. The gate insulator surrounds the semiconductor pillar in a plan view. The gate insulator penetrates the laminate in the lamination direction. The laminate has a first region and a second region. In the first region, conductive films and the first insulator films are arranged repeatedly in the lamination direction. The second region is located between the first region and the gate insulator. In the second region, a unit structures and first insulator films are arranged repeatedly in the lamination direction. The unit structure is a structure where a second insulator film, the conductive film and the second insulator film are arranged in the lamination direction. The second insulator film has a relative dielectric constant lower than that of the first insulator film.SELECTED DRAWING: Figure 3
Inventors:
KUBOI SHUICHI
Application Number:
JP2018003704A
Publication Date:
July 25, 2019
Filing Date:
January 12, 2018
Export Citation:
Assignee:
TOSHIBA MEMORY CORP
International Classes:
H01L27/11582; H01L21/336; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Sakai International Patent Office