SEMICONDUCTOR DEVICE

Japanese Patent JP2023099076

A

To provide a memory device using a semiconductor that stores data by using a transistor with a low leakage current between a source and a drain in an off state as a write transistor.SOLUTION: In a matrix formed using a plurality of memory cells in which the drain of a write transistor WTr(n, m) is connected with the gate and the drain of a read transistor RTr(n, m) and one of electrodes of a capacitor C(n, m), the gate of the write transistor is connected to a write word line Qn, the source of the write transistor and the source of the read transistor are connected to a bit line Rm, and the drain of the read transistor is connected to a read bias line Sn. Here, the conductivity types of the write transistor and the read transistor are made different in order to increase the degree of integration, the bias line may be substituted by a read word line Pn in another row, or the memory cells may be connected in series to form a NAND structure, and the read word line and the write word line may be shared.SELECTED DRAWING: Figure 1

TAKEMURA YASUHIKO

JP2023072330A

July 11, 2023

April 26, 2023

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SEMICONDUCTOR ENERGY LAB CO LTD

H10B12/00; H01L21/8234; H01L27/088; H01L29/786

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