Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3163820
Kind Code:
B2
Abstract:
PURPOSE: To realize a device which can be switched at a low ON voltage at a high speed, process a large latchup current and obtain a practical current capacity.
CONSTITUTION: A second emitter layer 5b isolated from a first emitter layer 5a is formed out of the layer 5a on a surface side of a p-type base in such a manner that the layer 5a is a source region of a first MOSFET and the layer 5b is a source region of a second MOSFET. This device is operated at a low ON voltage in a thyristor state at the time of ON according to a signal to be applied to first, second gate electrodes 10, 11, transferred to a transistor state at the time of OFF to be turned OFF in a short time. A main current of the transistor state flows to be deviated to the side of the layer 5a to a main current route of the thyristor state under the layer 5b. Since current routes of both modes are isolated, a resistance decrease of the current route in the transistor state is performed without enhancing the ON voltage, thereby obtaining a large latchup resistance.
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Inventors:
Masato Ohtsuki
Katsunori Ueno
Katsunori Ueno
Application Number:
JP3288493A
Publication Date:
May 08, 2001
Filing Date:
February 23, 1993
Export Citation:
Assignee:
Fuji Electric Co., Ltd.
International Classes:
H01L27/04; H01L29/74; H01L29/739; H01L29/745; H01L29/749; H01L29/78; H03K17/56; (IPC1-7): H01L29/749
Domestic Patent References:
| JP6276557A | ||||
| JP6244430A | ||||
| JP521783A | ||||
| JP3136371A | ||||
| JP63280459A |
Attorney, Agent or Firm:
Minoru Yamada