Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3465617
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To prevent restrictions on placement of a re-wiring in a chip-size package(CSP) in which a columnar electrode is provided on the re-wiring.
SOLUTION: A grounding electric potential layer 16 is provided over a circuit- element-forming region of an upper surface center part of a silicon substrate 11 via a first insulating film 14 inbetween. A re-wiring 20 is provided over the earthing electric potential layer 16 with a second insulation film 18. A columnar electrode 21 is provided on a connection pad part 20a, consisting of a tip part of the re-wiring 20. Even if an oscillating circuit, etc., provided in the circuit-element-forming region of the silicon substrate 11 crosses with the re-wiring 20, generation of crosstalks is prevented by the grounding electric potential layer 16, and restriction by the placement of the re-wiring 20 is prevented.
Inventors:
Yoshitaka Aoki
Ichiro Mihara
Takeshi Wakabayashi
Katsumi Watanabe
Ichiro Mihara
Takeshi Wakabayashi
Katsumi Watanabe
Application Number:
JP3575999A
Publication Date:
November 10, 2003
Filing Date:
February 15, 1999
Export Citation:
Assignee:
CASIO COMPUTER CO.,LTD.
International Classes:
H01L21/60; H01L21/822; H01L23/50; H01L23/52; H01L21/3205; H01L23/522; H01L27/00; H01L27/04; H01L29/40; H01L31/00; H01L; (IPC1-7): H01L21/3205; H01L21/60; H01L21/822; H01L27/04
Domestic Patent References:
| JP8330313A | ||||
| JP9252022A | ||||
| JP8236618A | ||||
| JP10189593A | ||||
| JP6260596A | ||||
| JP2254748A | ||||
| JP621348A | ||||
| JP5839061U |
Attorney, Agent or Firm:
Hanawa Yoshio
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