Title:
半導体装置
Document Type and Number:
Japanese Patent JP4204206
Kind Code:
B2
Abstract:
In order to provide a semiconductor device which has a bonding layer capable of providing electrical continuity between the cap and the semiconductor substrate, the semiconductor device comprises a semiconductor substrate whereon an element is formed on one principal plane thereof and a cap which hermetically seals the element so that a space is formed over the element, while the element is sealed by bonding a laminated bonding layer, which is formed around the element provided on the principal plane, and an Ni layer formed on the cap, wherein the laminated bonding layer is constituted from a first polysilicon layer which is doped with an impurity, an insulation layer and a second polysilicon layer which is not doped with an impurity, while the first polysilicon layer and the second polysilicon layer contact with each other in a part thereof so that the impurity diffuses through the contact area from the first polysilicon layer into the second polysilicon layer.
Inventors:
Yasuo Yamaguchi
Kunihiro Nakamura
Kunihiro Nakamura
Application Number:
JP2001166821A
Publication Date:
January 07, 2009
Filing Date:
June 01, 2001
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
G01P15/125; H01L23/04; B81B7/00; B81C1/00; G01P1/02; G01P15/08; H01L23/00; H01L23/02; H01L23/10; H01L29/84
Domestic Patent References:
| JP9292409A | ||||
| JP2001185635A | ||||
| JP2000243976A |
Attorney, Agent or Firm:
Aoyama Aoi