Title:
半導体装置
Document Type and Number:
Japanese Patent JP4260263
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor device having a package structure capable of reducing the mounting resistance. SOLUTION: First metal members (lead terminals 5, 6) are connected to a first electrode (a source electrode 2) of a semiconductor element (a semiconductor chip 1) via first metal bodies (Au bumps 8) including a noble metal, and a second metal member (a die terminal 7) is connected to a second electrode (a rear electrode 4) via second metal bodies (plated with noble metal 14 and Ag 15). Thereby, a drastic decrease in the mounting resistance such as 1 mΩ or lower can be achieved.
Inventors:
Ryoichi Kajiwara
Masahiro Koizumi
Toshiaki Morita
Kazuya Takahashi
Kishimoto Munehisa
Shigeru Ishii
Hirashima Toshinori
Takahashi Yasushi
Toshiyuki Hata
Hitoshi Sato
Keiichi Okawa
Masahiro Koizumi
Toshiaki Morita
Kazuya Takahashi
Kishimoto Munehisa
Shigeru Ishii
Hirashima Toshinori
Takahashi Yasushi
Toshiyuki Hata
Hitoshi Sato
Keiichi Okawa
Application Number:
JP1943199A
Publication Date:
April 30, 2009
Filing Date:
January 28, 1999
Export Citation:
Assignee:
Renesas Technology Corp.
Renesas Electronics East Japan Semiconductor Co., Ltd.
Renesas Electronics East Japan Semiconductor Co., Ltd.
International Classes:
H01L23/36; H01L23/29; H01L23/48; H01L23/34
Domestic Patent References:
| JP8064634A | ||||
| JP5343578A | ||||
| JP9129798A | ||||
| JP2281737A | ||||
| JP7078900A | ||||
| JP6291223A | ||||
| JP57103342A | ||||
| JP4004764U | ||||
| JP6275627A | ||||
| JP10084065A | ||||
| JP10163397A | ||||
| JP9275176A |
Attorney, Agent or Firm:
Yamato Tsutsui
Katsuo Ogawa
Katsuo Ogawa