Title:
半導体装置
Document Type and Number:
Japanese Patent JP5343904
Kind Code:
B2
Abstract:
Provided is a semiconductor device which avoids an adverse effect of high temperatures due to a switching element and in which a circuit to prevent false firing is arranged on the same substrate as the switching element. An N-channel type MOSFET. 10 and a JFET 30 of an N-channel type containing a semiconductor material of silicon carbide are individually arranged in proximity on conductive patterns 51, 52 on a substrate 5, and a gate electrode 13 of the MOSFET 10 and a drain electrode 31 of the JFET 30 are connected by a lead 61. When an external drive signal for on/off control of MOSFET. 10 propagates between source electrode 32 and drain electrode 31 of JFET 30, the channel resistance of JFET 30 is changed to a large/small value according to a low/high level of gate voltage between source electrode 32 and gate electrode 33, whereby a leading edge of a switching waveform between drain electrode 11 and source electrode 12 of MOSFET 10 comes to have a gentler slope than a trailing edge thereof.
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Inventors:
Kenichi Sawada
Application Number:
JP2010066708A
Publication Date:
November 13, 2013
Filing Date:
March 23, 2010
Export Citation:
Assignee:
Sumitomo Electric Industries, Ltd.
International Classes:
H01L21/822; H01L21/8232; H01L27/04; H01L27/06; H01L29/47; H01L29/872; H02M1/08
Domestic Patent References:
| JP2006191747A | ||||
| JP2007259576A |
Attorney, Agent or Firm:
Nobuo Kono