Title:
Semiconductor device
Document Type and Number:
Japanese Patent JP6143388
Kind Code:
B2
Abstract:
A storage circuit includes a volatile storage portion in which storage of a data signal is controlled by a clock signal and an inverted clock signal, and a nonvolatile storage portion in which a data signal supplied to the volatile storage portion can be held even after supply of power supply voltage is stopped. A wiring which supplies a power supply voltage and is connected to a protective circuit provided for a wiring for supplying the clock signal is provided separately from a wiring which supplies a power supply voltage and which is connected to the storage circuit. The timing of stop and restart of supply of the power supply voltage supplied to the wiring which is connected to the protective circuit is different from that of stop and restart of supply of the power supply voltage supplied to the wiring which is connected to the storage circuit.
Inventors:
Masashi Fujita
Application Number:
JP2016007682A
Publication Date:
June 07, 2017
Filing Date:
January 19, 2016
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H03K3/356; H03K19/00
Domestic Patent References:
| JP2010011226A | ||||
| JP5110392A | ||||
| JP2010124290A | ||||
| JP2011009719A | ||||
| JP2007194594A |