Title:
Semiconductor device
Document Type and Number:
Japanese Patent JP6338832
Kind Code:
B2
Abstract:
Disclosed is a semiconductor device in which a resistance component resulting from wiring is reduced. A plurality of transistor units are arranged side by side in a first direction, each of which has a plurality of transistors. The gate electrodes of the transistors extend in the first direction. First source wiring extends between first transistor unit and second transistor unit, and first drain wiring extends between the second transistor unit and third transistor unit. Second drain wiring extends on the side of the first transistor unit opposite to the side where the first source wiring extends, and second source wiring extends on the side of the third transistor unit opposite to the side where the second drain wiring extends.
Inventors:
Akira Matsumoto
Yoshinao Miura
Yasutaka Nakashiba
Yoshinao Miura
Yasutaka Nakashiba
Application Number:
JP2013158833A
Publication Date:
June 06, 2018
Filing Date:
July 31, 2013
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H01L21/338; H01L21/28; H01L21/336; H01L21/337; H01L29/778; H01L29/78; H01L29/808; H01L29/812
Domestic Patent References:
| JP2012023074A | ||||
| JP2012227432A | ||||
| JP2002299351A | ||||
| JP2007243018A |
Foreign References:
| WO2012043334A1 | ||||
| WO2013008382A1 |
Attorney, Agent or Firm:
Shinji Hayami
Satoshi Amagi
Satoshi Amagi