Title:
半導体装置
Document Type and Number:
Japanese Patent JP6661259
Kind Code:
B2
Abstract:
Two dual-gate transistors, which are electrically connected in parallel and provided in a compact design, are disclosed.
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Inventors:
Hideki Matsukura
Application Number:
JP2019030334A
Publication Date:
March 11, 2020
Filing Date:
February 22, 2019
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L29/786; H01L21/28; H01L29/41; H01L29/423; H01L29/49
Domestic Patent References:
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| JP2013138185A | ||||
| JP2011172217A | ||||
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