Title:
半導体装置
Document Type and Number:
Japanese Patent JP6678270
Kind Code:
B2
Abstract:
A memory device does not need a complex manufacturing process and whose power consumption can be suppressed, and a semiconductor device including the memory device. A solution is to provide a capacitor which holds data and a switching element which controls storing and releasing charge in the capacitor in a memory element. In the memory element, a phase-inversion element such as an inverter or a clocked inverter includes the phase of an input signal is inverted and the signal is output. For the switching element, a transistor including an oxide semiconductor in a channel formation region is used. In the case where application of a power supply voltage to the phase-inversion element is stopped, the data is stored in the capacitor, so that the data is held in the capacitor even when the application of the power supply voltage to the phase-inversion element is stopped.
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Inventors:
Jun Koyama
Shunpei Yamazaki
Shunpei Yamazaki
Application Number:
JP2019065850A
Publication Date:
April 08, 2020
Filing Date:
March 29, 2019
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L21/8234; H01L29/786; H01L21/8238; H01L27/06; H01L27/088; H01L27/092
Domestic Patent References:
| JP2005079360A | ||||
| JP5110392A | ||||
| JP2006050208A | ||||
| JP2005183984A | ||||
| JP2009135350A | ||||
| JP54044842A | ||||
| JP2002304889A |
Foreign References:
| WO2009063542A1 |