Title:
半導体装置
Document Type and Number:
Japanese Patent JP6918736
Kind Code:
B2
Abstract:
To provide a technology capable of improving ON resistance.SOLUTION: A semiconductor device 1 comprises: a p-type positive hole extraction area 15 provided below a contact trench TR2; an n-type electric-field relaxation area 16 provided below the positive hole extraction area 15, and contacted with a body area 13 located below the positive hole extraction area 15; and a p-type lower area 17 provided below the electric-field relaxation area 16. An impurity concentration of the electric-field relaxation area 16 is lower than that of a drift region 12.SELECTED DRAWING: Figure 1
Inventors:
Takashi Suzuki
Akira Yamada
Satoshi Moriya
Akira Yamada
Satoshi Moriya
Application Number:
JP2018070945A
Publication Date:
August 11, 2021
Filing Date:
April 02, 2018
Export Citation:
Assignee:
株式会社豊田中央研究所
株式会社デンソー
株式会社デンソー
International Classes:
H01L29/78; H01L21/336; H01L29/06; H01L29/12; H01L29/739
Domestic Patent References:
| JP2014225599A | ||||
| JP2017162909A | ||||
| JP2017162939A | ||||
| JP2004259934A | ||||
| JP2002528916A |
Attorney, Agent or Firm:
Kaiyu International Patent Office