Title:
半導体装置
Document Type and Number:
Japanese Patent JP7105332
Kind Code:
B2
Abstract:
Provided is a semiconductor device in which change in characteristics of a transistor is suppressed and an output signal is changed sharply without increasing W/L of the transistor can be provided. Two transistors are connected in parallel between a wiring to which a low potential is supplied and an output terminal. When the low potential is output from the output terminal, both of the two transistors are turned on and then one of them is turned off. Thus, change in characteristics of the transistor can be suppressed and an output signal can be changed sharply without increasing W/L of the transistor.
Inventors:
Atsushi Umezaki
Application Number:
JP2021027477A
Publication Date:
July 22, 2022
Filing Date:
February 24, 2021
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G09G3/20; G02F1/1368; G09G3/36; G11C19/28; H01L29/786; H03K3/356; H03K17/687
Domestic Patent References:
| JP2010277652A | ||||
| JP2010250304A | ||||
| JP2010152347A | ||||
| JP2005293817A |
Foreign References:
| US20060007085 |