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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH01261922
Kind Code:
A
Abstract:

PURPOSE: To enlarge a margin with respect to noise and to improve reliability by making the logical threshold voltage of at least one of CMOS circuits and of at least one of BiCMOS circuits almost similar.

CONSTITUTION: For making the logical threshold voltage VTLB of the BiCMOS circuits half a power voltage, for example, the base voltage V15 of a bipolar transistor 8 comes to 1/2VCC+VBE when an input V1 and an output V0 shows 1/2VCC. Since (p) and (n) channel MOS transistors 4 and 5 generate a CMOS inverter and the output voltage shows V15, V15 can be set to 1/2VCC+VBE by appropriately deciding the ratio of respective gate widths. On the other hand, the logical threshold voltage VTLC can be set to 1/2VCC in the CMOS inverter by appropriately selecting the ratio of the gate widths of (p) and (n) channel MOS transistors 13 and 14. Thus, a noise margin becomes maximum and the reliability of a semiconductor device can be improved.


Inventors:
KATO SHISEI
WATABE TAKAO
HORI RYOICHI
KITSUKAWA GORO
KAWAJIRI YOSHIKI
KAWAHARA TAKAYUKI
ITO KIYOO
Application Number:
JP8906188A
Publication Date:
October 18, 1989
Filing Date:
April 13, 1988
Export Citation:
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Assignee:
HITACHI LTD
HITACHI DEVICE ENG
International Classes:
G11C11/417; G11C11/34; G11C11/414; H03K5/02; H03K19/00; (IPC1-7): G11C11/34; H03K5/02; H03K19/00
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)