PURPOSE: To increase a capacitance and to reduce an area occupied by a memory cell by a method wherein a capacitor, as a laminated type capacitor, constituting the memory cell is stretched from the inside of a groove to the surface of a semiconductor substrate and a charge-storage node electrode is covered with a faced capacitance electrode.

CONSTITUTION: A capacitance storage charge node electrode 13 is covered with a first capacitance plate and a second capacitance plate 7, 15 via a first capacitance insulating film 8 and a second capacitance insulating film 14; the whole surface of a node electrode 13-2 becomes a capacitor structure inside a capacitance groove 3. A capacitor is stretched from the inside of the groove 3 to the upper part of a gate electrode 10 on the surface of a substrate 1 ; the electrode 13 comes into contact with one of source-drain regions 12 on the surface of the substrate 1 and comes into contact with the first capacitance plate 7 and the second capacitance plate 15 at a peripheral part of a memory cell; it is connected to an external power supply and is set at a definite voltage. When memory cells faced via the capacitance groove are separated, it is not required to form a field region, and an area occupied by the cell can be reduced sharply.