PURPOSE: To improve the connection reliability of a solder bump to be connected with the electrode pad on a multilayer interconnection by arranging dummy patterns in a spare region of a wiring layer below the highest layer wiring to which the solder bump is bonded.
CONSTITUTION: Below a solder bump 2, a fourth layer Al wiring (the highest layer wiring) 4 for supplying electric power extends in right and left direction, and the solder bump 2 is connected with said Al wiring. The line width of the Al wiring 4 is, e.g., in the range of more than ten μm to several tens of μm. Below the fourth layer Al wiring 4, third layer Al wirings 3a-3d for signal input and output extend in up and down direction at specific intervals. The Al wirings 3a-3d are narrower than the fourth Al wiring 4, and the line width is about several micrometers. In a spare region of the same wiring layer as the third Al wirings 3a-3d, a plurality of dummy patterns 5 constituted of the same layer aluminum as the Al wirings 3a-3d are spread in the same direction as the Al wirings 3a-3d. As a result, the increase of parasitic capacitances of the Al wirings 3a-3d is restrained to a minimum by arranging the dummy patterns 5.
OGAYA KAORU
KOBAYASHI TORU
KAWAJI MOTONORI
| JPS59188143A | 1984-10-25 | |||
| JPS60119749A | 1985-06-27 | |||
| JPH01196855A | 1989-08-08 |