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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH03289150
Kind Code:
A
Abstract:

PURPOSE: To eliminate false evaluation by a method wherein a pad for a specific lead having a large effect on the characteristic of a semiconductor chip is provided in the vicinity of a bonding hole of an insulating film, for checking up the characteristic.

CONSTITUTION: An insulating film 2 has a chip hole 2a and bonding holes 26, and an inner lead 3a, an outer lead 3b and a pad 3c are formed integrally for each non-specific lead 3. For a specific lead 31 of which the series inductance and resistance component have a large effect on checking of the characteristics of a semiconductor chip, an inner lead 31a arranged with the inner lead 3a, an outer lead 31b arranged with the outer lead 3b and a pad 31c formed in the vicinity of the bonding hole 2b are formed integrally. For a specific lead 32, likewise, an inner lead 32a arranged with the inner lead 3a, an outer lead 32b arranged with the outer lead 3b and a pad 32c provided in the vicinity of the bonding hole 2b are formed integrally. According to this constitution, the characteristics of the semiconductor chip are checked up accurately and false evaluation of a good product as a bad one can be prevented.


Inventors:
SENDAI SHINICHI
Application Number:
JP9113190A
Publication Date:
December 19, 1991
Filing Date:
April 05, 1990
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L21/60; (IPC1-7): H01L21/60
Attorney, Agent or Firm:
Sadaichi Igita