Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH07307447
Kind Code:
A
Abstract:
PURPOSE: To make a noise margin to be large and realize high integration without increasing a basic cell area in a complementary MIS type basic cell.
CONSTITUTION: The gate length of p-chTr is made smaller than that of n-chTr, and, in consequence, the contact windows 11, 12 and 13 for p-chTr are made larger than the contact windows 8, 9 and 10 for n-chTr. Thus, the current driving force for p-chTr can be increased and its contact resistance can be also reduced, thereby setting βR to be around a value 2. In addition, basic areas for n-chTr and p-chTr can be equalized, resulting in a highly integrated cell.
Inventors:
TANIGAWA TETSUO
Application Number:
JP23424794A
Publication Date:
November 21, 1995
Filing Date:
September 02, 1994
Export Citation:
Assignee:
RICOH KK
International Classes:
H01L29/78; H01L21/82; H01L21/8238; H01L27/092; H01L27/118; (IPC1-7): H01L27/118; H01L21/8238; H01L27/092; H01L29/78
Attorney, Agent or Firm:
Noguchi Shigeo