Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5489592
Kind Code:
A
Abstract:
PURPOSE:To simplify the manufacturing process of bipolar type IC, by providing the implanted region of low impurity concentration on the semiconductor substrate, growing the epitaxial layer of opposite conduction type on it, and obtaining the specified collector resistance value with mutual compensation of the impurity in the implanted region and the epitaxial layer. CONSTITUTION:The N type implanted region 2 having lower concentration than the impurity concentration conventionally used is formed on the P type Si substrate 1, and the P type layer 3 is epitaxially grown on the entire surface. Next, the layer 3 is passed through and the N type region 4 reaching the substrate 1 is formed with selective diffusion, and the concentration of the region 4 is selected so that the impurity of N type at the region 4 and the P type impurity of the layer 3 can be mutually cancelled and suitable resistance value can be obtained to the collector. Simultaneously, the N type is increased to the part overlaid for the regions 2 and 4 and the series resistor is lowered. After that, the P type separation region 5 is formed by diffusion until it reaches the substrate 1, and the regions 2 and 4 and the layer 3 are isolated in island manner. After this, the P type base region 6, N type emitter region 7, and collector contact region 8 are formed in conventional way.
Inventors:
MUKOUGAWA MASASHI
Application Number:
JP15883577A
Publication Date:
July 16, 1979
Filing Date:
December 27, 1977
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L21/70; H01L21/74; H01L21/8222; H01L27/04; H01L27/06; (IPC1-7): H01L21/72; H01L27/04