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Document Type and Number:
Japanese Patent JPS59115551
Kind Code:

PURPOSE: To enhance the mounting density of a semiconductor device by adjacently forming resin seals for sealing semiconductor elements at the same lead-frame, bonding the frames from the boundary of them, superposing them as a package, drawing the first and second outer leads from the bottom as a dual line array.

CONSTITUTION: Semiconductor elements 12a, 12b are die bonded at first and second element arranging units 11a, 11b by a lead-frame 11 in which the first and second units 11a, 11b are adjacently provided. Then, the end 11c of an inner lead and the elements 12a, 12b are connected via wirings 13. Thereafter, the elements 12a, 12b are sealed with resin in a transfer mold, seals 14a, 14b are then provided, bent and superposed at the center line A-A' of the seals 14a, 14b as a boundary with notches 15a, 15b as marks. In this manner, the elements 12a, 12b are opposed and folded, and the first and second outer leads 18a, 18b are drawn from the lower parts of the elements.

Kato, Toshihiro
Application Number:
Publication Date:
July 04, 1984
Filing Date:
December 22, 1982
Export Citation:
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International Classes:
H01L23/50; H01L23/28; H01L23/544; (IPC1-7): H01L23/28; H01L23/48

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