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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6154658
Kind Code:
A
Abstract:

PURPOSE: To stabilize substrate potential by forming a recessed section to an Si substrate in the vicinity of a transistor for a MOSIC and connecting a power supply line to the recessed section.

CONSTITUTION: An n type Si substrate 1 is isolated by an oxide film 11, a p well 2 is formed, and poly Si gate electrodes 3, 4 are attached onto gate oxide films 9, 10. n type source-drain 5, 6 and p type source-drain 7, 8 are shaped. Recessed sections are formed where near by channels in each FET, a p+ region 12 having low resistance and an n+ region 13 are shaped around the recessed sections in a wide area, and Al electrodes 14 are attached. According to the constitution, the potential of the substrate 1 can be fixed efficiently where near by the channels. Said constitution is also effective to the case of an (n) well CMOSFET similarly.


Inventors:
HORI CHIKAHIRO
Application Number:
JP17659084A
Publication Date:
March 18, 1986
Filing Date:
August 27, 1984
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L21/822; H01L21/8238; H01L27/02; H01L27/04; H01L27/092; H01L29/78; (IPC1-7): H01L27/04; H01L27/08; H01L29/78
Attorney, Agent or Firm:
Noriyuki Noriyuki



 
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