Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6159844
Kind Code:
A
Abstract:
PURPOSE:To inspect soldering easily by forming the peripheral shape of an internal-lead leading-out surface in a ceramic package housing a semiconductor chip to an irregular form and shaping pads for soldering for leading out internal leads while being adjoined to the peripheries in the recessed sections and the surfaces of the projecting sections. CONSTITUTION:A ceramic substrate 5 is constituted by a ceramic bottom plate 51, ceramic intermediate plates 52, 53 and a ceramic upper plate 54, irregularity sections at regular intervals are formed to a side edge in the bottom plate 51, through-holes are shaped adjacently, and a conductive path 512 is formed. The intermediate plate 52 has through-holes, and a metallized layer is formed to a section 521 on which a semiconductor chip 2 is loaded, and introduced to the bottom plate as a fourth layer by the through-holes through a conductive path 522. A square-shaped hole 531 is shaped to the intermediate plate 53, and through-holes are formed. Metallized layers are shaped radially up to severally corresponding through-holes from sections in the vicinity of the periphery of the square-shaped hole. A metallized layer 541 for sealing is formed to an upper surface in the upper plate 54. The plates 51-54 are laminated, and sintered, thus forming a base body 5. Accordingly, a large semiconductor chip can be loaded, and joining can be inspected easily.
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Inventors:
NABETA TERUYUKI
TSUJIMURA TAKEHISA
TSUJIMURA TAKEHISA
Application Number:
JP18190184A
Publication Date:
March 27, 1986
Filing Date:
August 31, 1984
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H01L21/52; H01L21/58; H01L21/60; H01L23/04; H01L23/057; H01L23/498; (IPC1-7): H01L21/58; H01L21/60; H01L23/02
Attorney, Agent or Firm:
Sadaichi Igita