Title:
半導体装置、及び電子機器
Document Type and Number:
Japanese Patent JP6854686
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor device performing maximum value pooling.SOLUTION: A semiconductor device comprises an input part and a memory cell. The memory cell includes a transistor and a capacitive element. The transistor is a p chanel type transistor and has a threshold value voltage V. A gate of the transistor and a first terminal of the capacitive element are electrically connected. When the transistor is in a conduction state by inputting a potential Vfrom the input part to the first terminal of the transistor, the first terminal of the capacitive element holds a potential V+V. Furthermore, when a potential Vexceeding the potential Vis then input to the first terminal of the transistor from the input part, the potential of the first terminal of the capacitive element is updated to V+V. By sequentially inputting a plurality of potentials to the first terminal of the transistor from the input part and thereafter reading out the potential of the first terminal of the capacitive element, the maximum value among the plurality of potentials can be read out.SELECTED DRAWING: Figure 1
Inventors:
Seiichi Yoneda
Application Number:
JP2017074129A
Publication Date:
April 07, 2021
Filing Date:
April 04, 2017
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G06F12/00; G06G7/60; G06N3/063; G11C11/405; G11C11/54
Domestic Patent References:
| JP2014209402A | ||||
| JP2016219011A | ||||
| JP2017500682A |