Title:
半導体装置および機器
Document Type and Number:
Japanese Patent JP6991816
Kind Code:
B2
Abstract:
A semiconductor apparatus includes a stack of first and second chips each having a plurality of pixel circuits arranged in a matrix form. The pixel circuit of the a-th row and the e1-th column is connected to the electric circuit of the p-th row and the v-th column. The pixel circuit of the a-th row and the f1-th column is connected to the electric circuit of the q-th row and the v-th column. The pixel circuit of the a-th row and the g1-th column is connected to the electric circuit of the r-th row and the v-th column. The pixel circuit of the a-th row and the h1-th column is connected to the electric circuit of the s-th row and the v-th column.
Inventors:
Katsuhito Sakurai
Yoshiaki Takada
Yoshihiro Shirai
Hideo Kobayashi
Koichi Nakamura
Daisuke Yoshida
Fumihiro Inui
Yoshiaki Takada
Yoshihiro Shirai
Hideo Kobayashi
Koichi Nakamura
Daisuke Yoshida
Fumihiro Inui
Application Number:
JP2017192050A
Publication Date:
January 13, 2022
Filing Date:
September 29, 2017
Export Citation:
Assignee:
Canon Inc
International Classes:
H04N5/374; H01L27/146; H04N5/378
Domestic Patent References:
| JP2014519703A | ||||
| JP2012104684A | ||||
| JP2017123381A | ||||
| JP2015122730A |
Foreign References:
| WO2014109044A1 |
Attorney, Agent or Firm:
Takuma Abe
Sougo Kuroiwa
Sougo Kuroiwa