Title:
半導体装置および半導体装置の製造方法
Document Type and Number:
Japanese Patent JP6416595
Kind Code:
B2
Abstract:
A method of manufacturing the semiconductor device includes forming a first gate member on a semiconductor substrate through a gate insulating film, forming a spacer on the first gate member, flattening a surface of the spacer, forming a first gate by partially etching the first gate member using the spacer as a mask, forming a second gate member so as to cover the first gate and the spacer having the flattened surface, forming a first insulating film on a surface of the second gate member, and forming a second gate by causing the second gate member to retreat while removing the first insulating film by etching, and the corresponding semiconductor device.
Inventors:
Ryo Chiba
Application Number:
JP2014231861A
Publication Date:
October 31, 2018
Filing Date:
November 14, 2014
Export Citation:
Assignee:
LAPIS Semiconductor Co., Ltd.
International Classes:
H01L21/336; H01L27/11524; H01L29/417; H01L29/788; H01L29/792
Domestic Patent References:
| JP2004104125A | ||||
| JP2003152121A | ||||
| JP2004221503A |
Attorney, Agent or Firm:
Atsushi Nakajima
Kato Kazunori
Hiroshi Fukuda
Kato Kazunori
Hiroshi Fukuda