Title:
半導体装置及びその製造方法
Document Type and Number:
Japanese Patent JP4031329
Kind Code:
B2
Abstract:
A semiconductor device includes a semiconductor substrate, cavities, and an element isolating region. The cavities, which are each shaped like a flat plate, are made in the semiconductor substrate. The element isolating region is formed in the surface of the semiconductor substrate and located at the sides of the cavities.
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Inventors:
Kazumi Ino
Hidemi Ishiuchi
Satoshi Matsuda
Riki Sato
Ichiro Mizushima
Hidemi Ishiuchi
Satoshi Matsuda
Riki Sato
Ichiro Mizushima
Application Number:
JP2002273409A
Publication Date:
January 09, 2008
Filing Date:
September 19, 2002
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L21/762; H01L21/76; H01L21/764; H01L21/8242; H01L21/84; H01L27/105; H01L27/108; H01L27/12; H01L29/06; H01L29/786; H01L21/334; H01L27/02; H01L27/11; H01L27/115; H01L27/22
Domestic Patent References:
| JP2000012858A | ||||
| JP2001281051A | ||||
| JP2001144276A | ||||
| JP2003332540A |
Attorney, Agent or Firm:
Takehiko Suzue
Sadao Muramatsu
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai
Sadao Muramatsu
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai
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