Title:
半導体装置及びその製造方法
Document Type and Number:
Japanese Patent JP4867396
Kind Code:
B2
Abstract:
A semiconductor device includes: an insulating layer selectively formed on the semiconductor base material; a first semiconductor layer made of single-crystal and formed on the semiconductor base material that is exposed below the insulating layer, the first semiconductor layer having an opening that exposes the semiconductor base material; an opening plane exposing a side face of the first semiconductor layer and provided below the support film, the second semiconductor layer and the first semiconductor layer by using the mask pattern as a mask; a portion defining a hollow part between the second semiconductor layer and the semiconductor base material; a first insulating film formed in the hollow part; and a second insulating film formed above the semiconductor base material on which the first insulating film is formed. The SOI forming region is provided in a plural number, and the insulating layer has a planar shape that encloses the SOI forming regions and separates one of the SOI forming regions from other SOI forming region in the enclosed area.
Inventors:
Kato Tatsu
Application Number:
JP2006054426A
Publication Date:
February 01, 2012
Filing Date:
March 01, 2006
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
H01L27/12; H01L21/762
Domestic Patent References:
| JP2006108206A | ||||
| JP2005322830A |
Foreign References:
| WO2005036638A1 |
Attorney, Agent or Firm:
Masahiko Ueyanagi
Osamu Suzawa
Osamu Suzawa