Title:
半導体装置及びその製造方法
Document Type and Number:
Japanese Patent JP6967024
Kind Code:
B2
Abstract:
According to one embodiment, a semiconductor device includes a first layer, a first electrode, and a first nitride region. The first layer includes a first material and a first partial region. The first material includes at least one selected from the group consisting of silicon carbide, silicon, carbon, and germanium. The first partial region is of a first conductivity type. The first conductivity type is one of an n-type or a p-type. A direction from the first partial region toward the first electrode is aligned with a first direction. The first nitride region includes Alx1Ga1-x1N (0≤x1<1), is provided between the first partial region and the first electrode, is of the first conductivity type, and includes a first protrusion protruding in the first direction.
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Inventors:
Shigeya Kimura
Manabu Yoshida
Tatsuo Shimizu
Ryosuke Iijima
Manabu Yoshida
Tatsuo Shimizu
Ryosuke Iijima
Application Number:
JP2019018150A
Publication Date:
November 17, 2021
Filing Date:
February 04, 2019
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L29/41; H01L21/205; H01L21/28; H01L21/336; H01L21/338; H01L29/417; H01L29/778; H01L29/78; H01L29/812; H01L29/861; H01L29/868
Domestic Patent References:
| JP2004200431A | ||||
| JP2014038919A | ||||
| JP2008227014A | ||||
| JP2005129696A | ||||
| JP2014103307A | ||||
| JP2012064663A |
Foreign References:
| WO2012090252A1 | ||||
| WO2013054431A1 |
Attorney, Agent or Firm:
Masahiko Hinataji
Junichi Kozaki
Hiroshi Ichikawa
Tatsutetsu Shirai
Takato Uchida
Isao Takeuchi
Junichi Kozaki
Hiroshi Ichikawa
Tatsutetsu Shirai
Takato Uchida
Isao Takeuchi