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Title:
SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD OF THE SAME
Document Type and Number:
Japanese Patent JP2012028547
Kind Code:
A
Abstract:

To provide a semiconductor element and a manufacturing method of the same which inhibit defects such as burr occurring when a chip is cut out of a support substrate on which an element region is formed via a junction metal film.

The semiconductor element comprises a support substrate and a laminated body bonded on the support substrate via a junction metal layer. The semiconductor element comprises an element part having layers from a bottom layer to a top layer included in the laminated body and a peripheral part provided around the element part in such a manner as to surround the element part. The peripheral part is a part of the layers from the bottom layer to the top layer included in the laminated body and includes at least a part of a semiconductor layer contacting the junction metal layer.


Inventors:
FUJIWARA AKIHIRO
TOMARIHO TAKASHI
MATSUNAGA NORIHIKO
YOSHIMURA KIMITAKA
KONDO KATSUAKI
Application Number:
JP2010000165583
Publication Date:
February 09, 2012
Filing Date:
July 23, 2010
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L33/30
Domestic Patent References:
JP2009123754A2009-06-04
Attorney, Agent or Firm:
日向寺 雅彦