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Patent Searching and Data


Title:
SEMICONDUCTOR IC WAFER AND MANUFACTURE OF SEMICONDUCTOR IC
Document Type and Number:
Japanese Patent JPH0541429
Kind Code:
A
Abstract:

PURPOSE: To facilitate circuit characteristics test of a semiconductor IC wafer chip using outside mounted resistors, by forming resistor elements connected with the internal circuit of a chip, in a scribe line region.

CONSTITUTION: Chips 2a, 2b formed on an IC wafer 1 are divided by a scribe line region 12. Signal pads 3, 4 for signal interface to the outside and a power supply pad 5 for power supply interface are arranged on each of the chips 2a, 2b. Resistors 10, 11 for test use are formed on the scribe line region 12, and one terminal of the resistor 10 is connected with the signal pad 3 through a signal line 6. In the same way, one end of the resistor 11 is connected with the signal pad 4 through a signal line 7. The cower supply pad 5 is connected with a power supply line 9 through a poxyer supply line 8. The power supply line 9 is formed on the scribe line region 12, and commonly connected with one end of a plurality of resistors like the resistors 10, 11. Thereby circuit characteristic test can be facilitated.


Inventors:
Yamazaki, Masuo
Kaji, Naoto
Application Number:
JP1991000197565
Publication Date:
February 19, 1993
Filing Date:
August 07, 1991
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L21/66; (IPC1-7): H01L21/66
Attorney, Agent or Firm:
内原 晋